Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
Accelerators or coprocessors in datacenters may offer a variety of benefits that are driving their implementation in datacenters. Moving frequently used algorithms into hardware may reduce a power to performance ratio by factors of ten or more. The algorithms may be abstracted to allow acceleration of a wide variety of functions. Thus algorithms using hardware acceleration may be along a spectrum of faster and less power with an advantage of 10× or more over software executed on general purpose processors.
Various systems are evolving to take advantage of FPGAs (reconfigurable accelerators) in moving frequently used algorithm into hardware. For example, some operating system changes may support and leverage reconfigurable computing. With the advance in tools for creating accelerators, even high level code may be composed into VHDL or other languages that may be implemented in reconfigurable accelerators. This may allow automated systems to create code and produce accelerator gate arrangements appropriate for an existing program.
Security in FPGAs, where the operational hardware is shared, is still in its early stages. Some systems for delivering encrypted FPGA code may only be read on the target FPGA, which may be useful in trusted design to ensure the gates reach the field intact, but less useful in a datacenter environment where the accelerator hardware may be virtualized and needed to be swapped quickly.